VLSI-SOC: From Systems to Chips: IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), ... Federation for Information Processing)


	VLSI-SOC: From Systems to Chips: IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), ... Federation for Information Processing) by: Manfred Glesner, Ricardo Reis, Leandro Indrusiak, Vincent Mooney, Hans Eveking en 0387334025 9780387334028 9780387334035

VLSI-SOC: From Systems to Chips: IFIP TC 10/WG 10.5, Twelfth International Conference on Very Large Scale Ingegration of System on Chip (VLSI-SoC 2003), ... Federation for Information Processing)
By Manfred Glesner, Ricardo Reis, Leandro Indrusiak, Vincent Mooney, Hans Eveking

Publisher: Springer
Number Of Pages: 316
Publication Date: 2006-05-17
ISBN-10 / ASIN: 0387334025
ISBN-13 / EAN: 9780387334028
Binding: Hardcover

Book Description:

This book presents extended and revised versions of the best papers that were presented during the twelfth edition of the IFIP TC10 Working Group 10.5 International Conference on Very Large Scale Integration. The purpose of this conference was to provide a forum to exchange ideas and show research results in the field of microelectronics design. The current trend toward increasing chip integration brings about exhilarating new challenges both at the physical and system-design levels. This book aims to address these exciting issues.

Table of Contents:

Effect of Power Optimizations on Soft Error Rate, pp. 1-20
Dynamic Models for Substrate Coupling in Mixed-Mode Systems, pp. 21-37
Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs, pp. 39-54
Automated Conversion of SystemC Fixed-Point Data Types, pp. 55-72
Exploration of Sequential Depth by Evolutionary Algorithms, pp. 73-83
Validation of Asynchronous Circuit Specifications Using IF/CADP, pp. 85-100
On-Chip Property Verification Using Assertion Processors, pp. 101-117
Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems, pp. 119-132
A Switched Opamp Based 10 Bits Integrated ADC for Ultra Low Power Applications, pp. 133-147
Exploring the Capabilities of Reconfigurable Hardware for OFDM-Based Wlans, pp. 149-164
Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures, pp. 165-179
Optimizing SOC Test Resources Using Dual Sequences, pp. 181-196
A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits, pp. 197-211
Low Power Java Processor for Embedded Applications, pp. 213-228
Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes, pp. 229-245
Evaluation Methodology for Single Electron Encoded Threshold Logic Gates, pp. 247-262
Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath, pp. 263-279
Gray Encoded Arithmetic Operators Applied to FFT and FIR Dedicated Datapaths, pp. 281-297
Stuck-At-Fault Testability of SPP Three-Level Logic Forms, pp. 299-313
Authors Index